Softlog Systems released Speed Optimization Software.

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The addition of the new Speed Optimization tools to Softlog´s family of ICP2 programmers enables end users to shorten production cycles, accelerate time-to-market and reduce manufacturing costs.
August 1, 2012 – Softlog Systems released today a new set of Speed Optimization software and firmware specifically designed to enable faster programming of Microchip microcontrollers. This set of advanced tools includes:
– Gap Eliminator™ feature that enables the exclusion of multiple empty (blank) flash and EEPROM areas in the HEX file from the programming process
– Speed Optimization utility that automatically configures the ICP2 programmer settings for the optimal speed performance
– Enhanced ICSP™ programming algorithms for Microchip´s PIC24/dsPIC33 16-bit devices

The Gap Eliminator™ feature significantly reduces programming times by identifying and eliminating empty areas (gaps) in a HEX file prior to the programming run. A typical programmer usually allows the operator to define a single programming range, thus enabling up to two empty areas to be skipped at the beginning and/or end of the file. However, if the gap(s) are located between valid data areas, this is not an effective solution. Softlog´s Gap Eliminator™ feature solves this problem. Before a production run, it automatically analyzes the HEX file and effectively removes multiple gaps (up to five) from the Program Memory (flash) and Data Memory (EEPROM). This enables higher throughput and drives major cost savings for mass production operations. The Gap Eliminator™ is available across Softlog´s ICP2 line of programmers.

The Speed Optimization utility is a wizard that guides the user through the ICP2 programmer configuration settings to ensure optimal speed performance. These settings include Clock/Data speed, Vdd-to-Vpp delay, VddOff delay, Gap Elimination, Enhanced ICSP and more.

The ICP2 programmers implement both low-level and Enhanced ICSP™ programming algorithms for 16-bit devices (i.e., Microchip´s PIC24/dsPIC33 families). The enhanced algorithms enable much faster programming than their low-level counterparts. For example, these algorithms reduce the programming time for PIC24FJ256GA110 (256KBytes) from 60 seconds to 13.5 seconds. This feature provides users with the flexibility to select the most suitable programming algorithm for a particular microcontroller.
The addition of the new Speed Optimization tools to Softlog´s family of ICP2 programmers enables end users to shorten production cycles, accelerate time-to-market and reduce manufacturing costs.
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